MEEP (MareNostrum Experimental Exascale Platform) is a flexible FPGA-based emulation platform that explores hardware/software co-designs for Exascale Supercomputers and other hardware targets based on European-developed IPs. Mainly, MEEP's ambition is to play two important roles within the Exascale computation paradigm:

  1. It becomes an evaluation platform of pre-silicon IP and ideas, capable of balancing speed and scalability.

  2. It becomes a software development and experimentation platform to enable software readiness for new hardware designs. MEEP accelerates software maturity, compared to the limitations of software simulation approaches, as IPs are tested and validated before moving to silicon, considering a realistic componentization characterization and running them under their targeted execution contexts, which means saving time and money.

Throughout its lifetime, MEEP delivers a series of Open-Source IPs when possible. They can be used for academic purposes and integrated into functional accelerators or cores for traditional and emerging HPC applications.

The MEEP project's first target accelerator is realized as a collection of chiplets with High Bandwidth Memory. The goal is to map as much of a single accelerator to a single FPGA and compose a system of multiple FPGAs or emulated accelerators. Based on this approach, it is possible to focus on emulation speed vs overall emulated accelerator performance. As a Proof of Concept (PoC), the first step is mapping a scaled-down functional and operative approximation of the emulated accelerator that fits in the FPGA, containing the main accelerator components. Additionally, the MEEP project provides software tools that translate the diverse nature of HPC applications into executables that run on top of the emulated hardware accelerator.


MEEP Platform characterization