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A flexible FPGA-based emulation platform that will explore hardware/software co-designs for Exascale Supercomputers and other hardware targets, based on European-developed IP.
MEEP will provide two important functions:
An evaluation platform of pre-silicon IP and ideas, at speed and scale.
A software development tool and experimentation platform to enable software readiness for new hardware.
MEEP enables software development, accelerating software maturity, compared to the limitations of software simulations. Moreover, IP can be tested and validated before moving to silicon, saving time and money.

News

'Women in STEM' interview featuring MEEP scientist Angela Salom
07 March 2022
'Women in STEM' interview featuring MEEP scientist Monika Raj
01 October 2021
'Women in STEM' interview featuring MEEP scientist Avani Bharadava
10 September 2021
MEEP part of the ETP4HPC Handbook of European HPC projects 2021
31 August 2021
View all news »

Events

3rd Workshop on RISC-V and OpenPOWER in HPC
27 June 2022
Online
ACM ICS 2022
27 June 2022
Thirteenth International Women in HPC workshop
02 June 2022 to 02 June 2022
Hamburg, Germany
The Twelfth International Workshop on Accelerators and Hybrid Emerging Systems (AsHES)
30 May 2022
Virtual Event
View all events »
The MEEP project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 946002. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Spain, Croatia, Turkey. Legal Notice
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© 2020 MEEP - The Marenostrum Experimental Exascale Platform
  • About
    • Objectives
    • Partners
    • Equality and Diversity
  • Platform ecosystem
    • Platform layers
    • Software
  • Events
  • Media
    • News & press releases
    • Press clippings
    • Branding
  • Results
    • Publications
    • Deliverables
  • Contact