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A flexible FPGA-based emulation platform that will explore hardware/software co-designs for Exascale Supercomputers and other hardware targets, based on European-developed IP.
MEEP will provide two important functions:
An evaluation platform of pre-silicon IP and ideas, at speed and scale.
A software development tool and experimentation platform to enable software readiness for new hardware.
MEEP enables software development, accelerating software maturity, compared to the limitations of software simulations. Moreover, IP can be tested and validated before moving to silicon, saving time and money.

News

MEEP to join the 8M celebration
08 March 2023
Celebrating the International Day of Women & Girls in Science 2023
11 February 2023
MEEP Biannual gathering
24 January 2023
Reuse of Verification Environment for a RISC-V Vector Accelerator in MEEP
18 October 2022
View all news »

Events

The RISC-V Summit Europe
05 June 2023 to 09 June 2023
Barcelona
EuroHPC Summit 2023
20 March 2023 to 23 March 2023
Gothenburg, Sweden
HiPEAC Workshop: European RISC-V HPC Roadmap
16 January 2023 to 16 January 2023
Toulouse ,France
RISC-V Summit 2022
13 December 2022 to 13 December 2022
San Jose, CA
View all events »
The MEEP project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 946002. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Spain, Croatia, Turkey. Legal Notice
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© 2020 MEEP - The Marenostrum Experimental Exascale Platform
  • About
    • Objectives
    • Partners
    • Equality and Diversity
  • Platform ecosystem
    • Platform layers
    • Software
  • Events
  • Media
    • News & press releases
    • Press clippings
    • Branding
  • Results
    • Publications
    • Deliverables
  • Contact