MEEP will create a state-of-art emulation and software development platform for exascale systems based on European technology, that supports the development of new and reusable IP targeting FPGAs and eventually, ASICs.
The novelty of the accelerator is a so-called self-hosting accelerator, meaning the entire application resides in the memory of the accelerator, and the entire execution of the application happens on the accelerator.
MEEP will be of size and scale that goes far beyond normal academic or industrial prototyping platforms, enabling chips and system emulation. It will be of sufficient scale to emulate a meaningful fraction of the HPC environment.
Become a performance evaluation and software development vehicle for future silicon chip designs.
To be a testbed for other accelerators ranging from tightly to loosely coupled systems.
Improve the RISC-V software ecosystem with an improved and extended software tool chain and suite of HPC applications.
Deliver a series of Open-Source IPs for academics, traditional and emerging HPC applications.
|Project Name||The MareNostrum Experimental Exascale Platform|
|Funding Scheme||RIA - Research and Innovation Action|
|Grant Agreement ID||946002|
|Project Coordinator||Barcelona Supercomputing Center (BSC)|
|Start Date||1 January 2020|
|End Date||31 December 2022|
|Number of Partners||3|
|Overall Budget||€10.3 million|
|EU Contribution||€5.15 million|