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A flexible FPGA-based emulation platform that will explore hardware/software co-designs for Exascale Supercomputers and other hardware targets, based on European-developed IP.
MEEP will provide two important functions:
An evaluation platform of pre-silicon IP and ideas, at speed and scale.
A software development tool and experimentation platform to enable software readiness for new hardware.
MEEP enables software development, accelerating software maturity, compared to the limitations of software simulations. Moreover, IP can be tested and validated before moving to silicon, saving time and money.

News

The HiPEAC Award-Winning FPGA-Shell and Its Impact on RISC-V Development
28 November 2023
MEEP: Advanced IP Development Platform Enabling RISC-V Based HW/SW Co-Design for HPC Systems
21 September 2023
MEEP infrastructure will contribute to developing European technologies
18 May 2023
EuroHPC Summit 2023: Highlights from the MEEP Project Poster
03 April 2023
View all news »

Events

Jornada Sarteco
20 September 2023 to 22 September 2023
Ciudad Real, Spain
ACACES 2023
09 July 2023 to 15 July 2023
Fiuggi, Italy
Summer School for Female Leadership in the Digital Age
27 June 2023 to 27 June 2023
Valencia, Spain
ALLPROS webinar: Strategic Open Innovation in the Chip Ecosystem
20 June 2023 to 20 June 2023
Online
View all events »
The MEEP project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 946002. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and Spain, Croatia, Turkey. Legal Notice
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© 2020 MEEP - The Marenostrum Experimental Exascale Platform
  • About
    • Objectives
    • Partners
    • Equality and Diversity
  • Platform ecosystem
    • Platform layers
    • Software
  • Events
  • Media
    • News & press releases
    • Press clippings
    • Branding
    • Videos
  • Results
    • Publications
    • Deliverables
    • Releases
    • Key exploitable results
  • Contact